Fly Gemini V3 Pin map
Edit me
Fly-Gemini-V3 Pinout Diagram
Fly-Gemini-V3 Driver Pins in Firmware
Driver pin numbers. They are separated into driver number.
Pin Type |
0 (X) |
X Alias |
1 (Y) |
Y Alias |
2 (Z) |
Z Alias |
3 (E0) |
EXT Alias |
Enable Pins |
PA3 |
X_EN |
PD2 |
Y_EN |
PC12 |
Z_EN |
PC11 |
EXT_EN |
Step Pins |
PC13 |
X_STEP |
PC14 |
Y_STEP |
PC15 |
Z_STEP |
PC3 |
EXT_STEP |
Direction Pins |
PC1 |
X_DIR |
PC4 |
Y_DIR |
PC5 |
Z_DIRPC12 |
PC8 |
EXT_DIR |
UART Pins |
PB11 |
X_UART |
PC10 |
Y_UART |
PB7 |
Z_UART |
PB6 |
EXT_UART |
Fly-Gemini-V3 Other Pins in Firmware
Pin Number |
Pin Name 1 |
Pin Name 2 |
Alias |
|
PA0 |
e0heat |
he0 |
HE0 |
|
PA1 |
probe |
|
PROBE_1 |
|
PA10 |
LCD_RS |
RX1 |
EXP1_4 |
|
PA13 |
LCD_EN |
|
EXP1_3 |
|
PA14 |
LCD_BTN_EN2 |
|
EXP2_5 |
|
PA15 |
LCD_BTN_EN1 |
|
EXP2_3 |
|
PA2 |
bed |
hbed |
HE1 |
|
PA7 |
LCD_CD |
|
EXP2_7 |
|
PA8 |
LCD_D5 |
|
EXP1_6 |
|
PA9 |
LCD_D4 |
TX1 |
EXP1_5 |
|
PB0 |
servo0 |
|
|
|
PA4 |
xstop |
|
LIMIT0 |
|
PA5 |
ystop |
|
LIMIT1 |
|
PA6 |
zstop |
|
LIMIT2 |
|
PB1 |
estop |
|
LIMIT3 |
|
PB10 |
LCD_ENC_SW |
|
EXP1_2 |
|
PB12 |
LCD_SS |
|
EXP2_4 |
|
PB13 |
LCD_SCK |
|
EXP2_2 |
|
PB14 |
LCD_MISO |
|
EXP2_1 |
|
PB15 |
LCD_MOSI |
|
EXP2_6 |
|
PC0 |
e0temp |
t0 |
TH0 |
|
PC2 |
bedtemp |
tb |
TH1 |
|
PC6 |
fan0 |
fan |
FAN0 |
|
PC7 |
fan1 |
|
FAN1 |
|
PC9 |
LCD_BEEP |
|
EXP1_1 |
|
<NC> |
LCD_D6 |
|
EXP1_7 |
|
<NC> |
LCD_D7 |
|
EXP1_8 |
|
<GND> |
LCD_GND |
|
EXP1_9 |
|
<5V> |
LCD_VCC |
|
EXP1_10 |
|
<RST> |
LCD_RST |
|
EXP2_8 |
|
<GND> |
LCD_GND |
|
EXP2_9 |
|
<NC> |
LCD_KILL |
|
EXP2_10 |
|
Socket ZH2
Label |
Name |
40 Pin header number |
Function |
TFT Display Pin |
TFT Name |
Board Name |
RX |
UART2_RX |
10 |
PA1/UART2_RX/JTAG_CK0/PA_EINT |
10 |
IRQ |
RX |
TX |
UART2_TX |
8 |
PA0/UART2_TX/JTAG_MS0/PA_EINT0 |
|
|
TX |
G |
Ground |
|
|
|
|
G |
5v |
+5v |
|
|
|
|
5V |
Socket ZH1
Label |
Name |
40 Pin header number |
Function |
TFT Display Pin |
TFT Name |
Board Name |
RX |
UART1_RX |
11 |
PG7/UART1_RX/PG_EINT7 |
8 |
RES |
RX |
TX |
UART1_TX |
12 |
PG6/UART1_TX/PG_EINT6 |
9 |
DC |
TX |
G |
Ground |
|
|
|
|
G |
5V |
+5v |
|
|
|
|
5V |
Socket ZH3
Label |
Name |
40 Pin header number |
Function |
TFT Display Pin |
TFT Name |
Board Name |
RTS |
UART3_RTS |
NA |
PA15/SPI1_MOSI/UART3_RTS/PA_EINT15 |
1 |
SDI |
SI |
CTS |
UART3_CTS |
16 |
PA16/SPI1_MISO/UART3_CTS/PA_EINT16 |
2 |
CLK |
CLK |
RX |
UART3_RX |
13 |
PA14/SPI1_CLK/UART3_RX/PA_EINT14 |
3 |
SDO |
SO |
TX |
UART3_TX |
15 |
PA13/SPI1_CS/UART3_TX/PA_EINT13 |
4 |
CSO |
CS |
SDA |
I2C1_SDA |
NA |
PA19/PCM0_CLK/TWI1_SDA/PA_EINT19 |
5 |
CS1 |
IO |
G |
Ground |
6 |
GND |
G |
|
|
5v |
+5v |
7 |
5V |
5V |
|
|
Socket ZH5
Label |
Name |
40 Pin header number |
Function |
TFT Display Pin |
TFT Name |
Board Name |
MOSI |
SPI0_MOSI |
19 |
PC0/NAND_WE/SPI0_MOSI |
|
|
SI |
CLK |
SPI0_CLK |
23 |
PC2/NAND_CLE/SPI0_CLK |
|
|
CLK |
MISO |
SPI0_MISO |
21 |
PC1/NAND_ALE/SPI0_MISO |
|
|
SO |
CS |
SPI0_CS |
24 |
PC3/NAND_CE1/SPI0_CS |
|
|
CS |
SCL |
I2C1_SCL |
NA |
PA18/PCM0_SYNC/TWI1_SCK/PA_EINT18 |
|
|
IO |
G |
Ground |
|
|
|
|
G |
5v |
+5v |
|
|
|
|
5V |
Tags: